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I think one of the most influential designs of recent times has been the DEC Alpha lineage of 64-bit RISC processors[1]. Originally introduced in 1992, with a superscalar design, branch prediction, instruction and data caches, register renaming, speculative execution, etc. My understanding is that when these came out, they were way ahead of any other CPU out there, both in terms of innovative design and performance.

Looking at this chip, it seems to me that almost all the innovations Intel brought to the Pentium lines of CPU over many years were basically reimplementing features pioneered by the DEC Alpha, just over a decade later, and bringing these innovations to consumer-grade CPUs.

[1]: https://en.wikipedia.org/wiki/DEC_Alpha



I loved working on DEC Alphas. They seemed to me like the best of breed conventional 64 bit machines, and it was sad when we quit buying them because x86 boxes were cheaper.

> it seems to me that almost all the innovations Intel brought to the Pentium lines of CPU over many years were basically reimplementing features pioneered by the DEC Alpha

I can't find a strong source to link, but I thought most of the Alpha team ended up at Intel. If so, that would explain the trickling in of re-implementations.


> I can't find a strong source to link, but I thought most of the Alpha team ended up at Intel.

DEC was bought by Compaq, who sold the team to Intel at the same time it was bought by HP. Intel's Massachusetts site is a former DEC facility.


DEC sold its StrongARM (ARM-based) business to Intel in 1997, before DEC was taken over by Compaq in 1998. It resulted in Intel's XScale business, which it later sold to Marvell.

Compaq abandoned DEC's Alpha for the HP/Intel Itanic, so Intel didn't get an Alpha business. However, Compaq sold the Alpha IP to Intel in 2001, before the HP takeover in 2002.

I'd be interested to know what happened to the Alpha architects, Richard L. Sites and Richard T. Witek. A quick search doesn't find anything interesting.

I remember there was a breakaway of DEC engineers founding a small chip design company, but can't remember what it was called.


Dirk Meyer ended up at AMD, it was why the likes of Hypertransport borrowed/adapted the Alpha EV6 protocol and kicked serious arse.

Always loved Alpha's, their influence cast a long shadow.


K7 Athlon's actually just used EV6 bus, to the point where motherboards were compatible with each others if you made a connector adaptor and replaced firmware.

I have had very unconfirmed rumour that K8 involved so much of DEC stuff (starting with it's obviously EV7-derived design) that at one point it still had support for VAX floating point...


Thats class! thanks for the info.


One of my CS professors used to work at DEC. His lectures were starkly clear and pretty intense.

Jim Keller and other folks from PA Semi worked at DEC earlier in their careers.


I worked at DEC- one thing that I really miss is the high quality of documentation they produced. A lot of it has been archived here:

https://archive.org/details/bitsavers_dec


Through Keller they defined the last decades.


We got an Alpha, a PPC and a MIPS for testing 64 bit compatibility for our app. I believe they were donated, to make sure our code (Mosaic) ran on Windows NT.

I used the DEC as my personal machine. Hardly anyone ever touched the other two, except to verify bug reports.


Superscalar dates to the CDC 6600, a machine I don't understand very well; branch prediction I think dates to Stretch, but the 70s at latest; instruction and data caches were commonplace in high-performance computers by the 1970s, and as the article points out, the 6600 had I$, and the 360/85 had a cache too (not sure if split). I'm not sure about register renaming and speculative execution, but I'd be surprised if they date from as late as the αXP.


Register renaming was IBM 360/91 1967

https://en.wikipedia.org/wiki/Tomasulo_algorithm


Thank you!


Alpha is also unique in that it's the only architecture that doesn't preserve data dependency ordering.


It's the only CPU architecture. I think many accelerators (e.g., GPUs) don't preserve it either.


I think by the definition I was using, data dependency ordering is preserving order on a single thread. All GPUs I'm aware of enforce this.


Cray built a massively parallel machine out of a bunch of Alphas. (Cray Research Inc, iirc, not Seymour Cray). The T3 I think.

DEC had bragged about the features of the cpu useful for parallelization. Cray engineering complained about the features missing for parallelization. It was all described in a glossy Cray monthly magazine description of the new machine but I've been unable to locate a copy.

I disliked the Alpha floating point, it was always signalling exceptions for underflow. Otherwise a fine set of machines.


> I disliked the Alpha floating point, it was always signalling exceptions for underflow.

Alpha floating point wasn't the problem.

The problem was that a whole bunch of "clever" folks used "underflow" for all manner of weird reasons on x86. So, whenever Alpha either ran ported or emulated x86 code, it ran into underflows with far greater frequency than any actual numerical applications ever would.


Intel ended up buying Digital Equipments chip making business..

There where patent disputes and such.

According to this article which describes the sale, windows NT ran on alpha.

https://www.latimes.com/archives/la-xpm-1997-oct-28-fi-47463...


According to my memory they have been sold with NT (4.0?) in Germany by a long gone PC retailer called Vobis. I think for about 5000 DM.



I remember getting an MSDN CD wallet that included a build of Windows NT for Alpha. Of course, I never had an Alpha on which to run it.


One of the nice things was that you could run Windows NT on a DUAL PROCESSOR PC with two Alpha chips. This was such an attractive idea I thought of buying one. However, when I did a very quick trial, it didn't make any noticeable difference to my very simple workloads (mostly Microsoft Office).


Yeah, I used NT 4.0 on Alpha when NT was still new.


AMD actually licensed a good bit of Alpha technology.


AMD hired a bunch of Alpha engineers to develop revolutionary Athlon line of CPUs.


I remember, way back in the 90s, working on NT 3.5/4 on some DEC Alphas in Sony Broadcast at Oxford, UK. The sysadmin there was a cool dude who I remember was amazed at how insane network speeds were getting. I think those guys at Oxford were responsible for a very nice recording studio mixer that Sony made.

I remember DEC Alphas absolutely stomped all over the x86 stuff that everyone else was using, but the flexibility and price of the commodity PCs was just too attractive. Pity, really.


I don't know if it's relevant for computer architects, but one great thing about Alphas (at least the ones I operated) was their relatively huge memory and cache. They were much admired generally by users processing data. An individual crystallography image might fit in cache, and a typical complete dataset in memory -- not that that stopped the maintainer of the main analysis program retaining the disk-based sort bottleneck originating on PDP-11s...




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