There are two ECC types in DDR5: on-die ECC and external.
All have on-die ECC, which always operates. It is relatively rare to have external; something like Kingston Server Premier, and then you would need a motherboard to support it e.g. some of the Asrock ones, or just a server motherboard (MSI D3051, etc.)
AFAIK there's a performance hit using external ECC, as it adds an extra cycle. I think errors get reported to the OS differently. Beyond that, I know nothing.
Just to dispel this myth - here's all my electronic devices that have replaceable memory, and which of them support ECC:
ECC support (and using ECC memory):
- my old home server (an old Xeon E5-2630v2, DDR3, Supermicro MB, slated for disposal)
- my new home server (a Ryzen V3C48 embedded system, solid-run, uses DDR5 SO-DIMM)
- my desktop (a Ryzen 1700X, DDR4, ASrock mainboard)
Broken ECC due to BIOS:
- my laptop (HP Elitebook 845 G9, Ryzen 6950HS, DDR5 SO-DIMM, CPU supports ECC; BIOS hangs on boot when I insert ECC memory)
No ECC:
- none, actually.
(dis-)honorable mentions, no ECC, but memory not replaceable anyway:
- my geriatric wifi router (some TP-link, about to be ditched)
- my 2 extra wifi APs (also some TP-link)
This rate of ECC support is probably a bit exceptional, but… the primary reason ECC support is hit-and-miss is that Intel decided to fuse it off on their desktop CPUs to do market segmentation.
The fact that a handful of enthusiasts on a technology forum have machines with ECC has zero relevance to whether it is rare. It is. Virtually all consumer prebuilt x86 PCs lack ECC. The majority of DIY builds are Intel, and their enthusiast Core CPUs lack ECC. Most Ryzen boards do not actually support it.
When people say ECC is rare, they’re not talking about you.
> AFAIK there's a performance hit using external ECC, as it adds an extra cycle.
This may be the case in some specific implementations but nothing in the DDR5 spec prevents you from pipelining the ECC calculations alongside the cycles you already need for cache management anyway. The memory itself and the interface don't care, they just do 72bit instead of 64bit.
I base this on my day-to-day messing with firmware for some Arm microcontroller implementations, and it is only a guess that PC would be similarly affected and only affecting latency, not throughput. But, in this specific case, I don't know.
I only learned enough to buy some and put it in my last build, and I've only gone as far as checking that dmesg says the memory bus is 72 bits wide; no benchmarks, no overclocking. Then again, my goal is stability and not performance.
All have on-die ECC, which always operates. It is relatively rare to have external; something like Kingston Server Premier, and then you would need a motherboard to support it e.g. some of the Asrock ones, or just a server motherboard (MSI D3051, etc.)
AFAIK there's a performance hit using external ECC, as it adds an extra cycle. I think errors get reported to the OS differently. Beyond that, I know nothing.