I'd like to know more. I expect these systems are 8xvh1782. Is that true? What's... | Hacker News

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		fooblaster 3 months ago \| parent \| context \| favorite \| on: TinyTinyTPU: 2×2 systolic-array TPU-style matrix-m... I'd like to know more. I expect these systems are 8xvh1782. Is that true? What's the theoretical math throughput - my expectation is that it isn't very high per chip. How is performance in the prefill stage when inference is actually math limited?

dnautics 88 days ago [–]

i was a software guy, sorry, but those token rates are correct and what was flowing through my software.

i believe there was a special deal on super special fpgas. there were dsps involved.

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